Saturday, May 17, 2008

IEEE Design & Test of Computers, Jan/Feb 2008

Design & Test of RFIC Chips
- Design and Analysis of a Transversal Filter RFIC in SiGe Technology.
- Design of a Low-Noise UWB Transceiver SiP.
- Decreasing Test Qualification Time in AMS and RF Systems.
- Light-Enhanced FET Switch Improves ATE RF Power Settling.

Networks on Chips
Time-Division-Multiplexed Test Delivery for NoC Systems.

Dynamic Power Management
Low-Impact Processor for Dynamic Runtime Power Management.

PDF | 6.9 MB

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